Lead-frame array package structure and method

ABSTRACT

The present invention provides a lead-frame array package structure. The package structure includes a lead-frame, which composed of a plurality of shorter leads and a plurality of longer leads. The first surface and a second surface are composed of the shorter leads and the longer leads. The chip is fixedly connected to the first surface of the lead-frame. The metal pads are positioned on the one side of the active layer of the chip. The metal pads are electrically connected to the leads of the lead-frame via the metal leads. The chip, the metal leads, the first surface and the second surface of the lead-frame is encapsulated by encapsulated material to expose the portion of the metal of the leads. The conductive elements are electrically connected to exposed leads so as to an array arrangement is formed on the second surface of the lead-frame.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention is a package structure, more particularly; it is alead-frame array package structure.

2. Description of the Prior Art

In recent years, the Computer/Communication/Consumer (3C) electronicsare so popular in public. The size of the 3C products are moreattractive if the size of the electronics is smaller. Therefore, it isnecessary to decrease the size of the semiconductor inside the 3Cproducts. For this reason, the wafer level chip scale package (WL-CSP)is well known to use for the semiconductor in the second half packageprocess in order to reduce the size of the semiconductor. For example,there is a re-distribution layer used to form ball grid array (BGA)package structure in U.S. Pat. No. 7,129,581, as shown in FIG. 7.Obviously, the good-die test is able to execute after all the packageprocesses were done and the wafer was cut, when the WL-CSP packageprocess is used. If there is a fault happened in the package process, itwould waste a lot of package cost. In the meantime, the redistributionlayer package process is a high cost and time consuming technique, andit is not good for economic benefices, especially for single-chippackage.

SUMMARY OF THE INVENTION

According to drawbacks and problems described above for the single-chippackage method, the main object of the present invention is to provide alead-frame array package structure disposed on the lead-frame by thearray method to dispose a plurality of conductive elements.

Another object of the present invention is to provide a lead-frame arraypackage structure to reduce the size of the package structure and thepackage process cost by the array method to dispose a plurality ofconductive elements.

According to the objects described above, a lead-frame array packagestructure is provided in the present invention. The package structureincludes a lead-frame, which composed of a plurality of shorter leadsand a plurality of longer leads. The first surface and a second surfaceare composed of the plurality of shorter leads and the plurality oflonger leads. The chip is fixedly connected to the first surface of thelead-frame. The plurality of metal pads is positioned on the one side ofthe active layer of the chip. The plurality of metal pads iselectrically connected to the plurality of leads of the lead-frame viathe plurality of metal leads. The chip, the plurality of metal leads,the first surface and the second surface of the lead-frame isencapsulated by encapsulated material to expose the portion of theplurality of leads. The plurality of conductive elements is electricallyconnected to exposed leads so as to an array arrangement packagestructure is formed on the second surface of the lead-frame.

A lead-frame package method is also provided in the present invention.The package method includes: forming a lead-frame in accordance with aplurality of shorter leads and a plurality of longer leads, and theshorter leads and the long leads are respectively and alternativelyparalleled to form a first surface and a second surface, a geographicshape is formed at the end of each of the long leads, the end with thegeographic shape is disposed at the same horizontal as the end of eachof the shorter lead; fixedly connecting a chip to the first surface ofthe lead frame by a adhesive layer and the chip includes an activelayer, one side of the active layer including a plurality of metal padsdisposed thereon; executing a wire bonding process to electricallyconnect a plurality of metal leads to the metal pads on the chip and theplurality of leads on the lead-frame; executing an encapsulated processto cover the chip, the metal leads and the first surface and the secondsurface of the lead-frame by an encapsulant material; exposing a portionof the metal of the second leads of the lead-frame by removing theencapsulant material on each end of the leads in accordance with aremoving process; and forming a plurality of conductive elements on theexposed metal leads and the conductive elements are used to electricallyconnected to the exposed metal leads.

BRIEF DESCRIPTION OF THE DRAWINGS

The foregoing aspects and many of the attendant advantages of thisinvention will become more readily appreciated as the same becomesbetter understood by reference to the following detailed description,when taken in conjunction with the accompanying drawings, wherein:

FIG. 1 is a top view of a lead-frame in accordance with an embodiment ofthe present invention.

FIG. 2 is a top view of a lead-frame with a plurality of leads withdifferent length respectively and alternatively paralleled to eachother.

FIG. 3A is a sectional view of a lead-frame package structure with 2×narrangement of the conductive elements.

FIG. 3B is a top view of the conductive elements with a plurality oflonger leads and shorter leads disposed thereon.

FIG. 4A is a sectional view of a lead-frame package structure with 4×narrangement of the conductive elements.

FIG. 4B is a top view of the conductive elements with a plurality oflonger leads and shorter leads disposed thereon.

FIG. 5A is a sectional view of a lead-frame package structure with 4×narrangement of the conductive elements by dual wire bonding process.

FIG. 5B is a top view of the conductive elements with a plurality oflonger leads and shorter leads disposed thereon.

FIG. 6 is a flow chart of a lead-frame package method according to thepresent invention.

FIG. 7 is a view showing the wafer level chip scale package in priorart.

DESCRIPTION OF THE PREFERRED EMBODIMENT

The detailed description of the present invention will be discussed inthe following embodiments, which are not intended to limit the scope ofthe present invention, but can be adapted for other applications. Whiledrawings are illustrated in details, it is appreciated that the quantityof the disclosed components may be greater or less than that disclosed,except expressly restricting the amount of the components.

First of all, according to the embodiments disclosed in the presentinvention, the lead-frame is made by forming a plurality of leads on acopper foil according to the stamp technique. The pattern of the leadsis designed by request. Because the stamp technique is a prior art, itis not a priority in the present invention. Therefore, the steps to forma plurality of lead-frames by the stamp technique are omitted herein.

Please referring to FIG. 1, it is a top view of the lead-frame structurein the present invention. As shown in FIG. 1, the lead-frame 10 isformed in accordance with a plurality of first leads 101 and a pluralityof second leads 102. The first leads 101 and the second leads are usedto form a first surface and a second surface (not shown). Each of thefirst leads 101 and each of the second leads 102 are respectively andalternatively paralleled to each other and there is an interval formedbetween each of the first leads 101 and each of the second leads 102.The end 104 of each of the second leads 102 forms a geographic shape,such as L shape or curved shape. The ends 104 with geographic shape andthe ends 103 of the first leads 101 are disposed at the same horizontal11.

FIG. 2 is a top view of another lead-frame structure in the presentinvention. The lead-frame 20 is formed in accordance with a plurality offirst leads 201, a plurality of second leads 202, a plurality of thirdleads 203 and a plurality of forth leads 204. The first leads 201, thesecond leads 202, the third leads 203 and the forth leads 204 are formeda first surface and a second surface. Each of the first leads 201, eachof the second leads 202, each of third leads 203 and each of forth leads204 are respectively and alternatively paralleled to each other andformed with different lengths. Except for the shorter leads (such as thethird leads 203), the rest of the longer leads (such as the first leads201, the second leads 202 and the forth leads 204) includes the endswith geographic shape, such as L shape or curved shape. The ends of thefirst leads 201, the second leads 202, the third leads 203 and the forthleads 203 are disposed at the same horizontal 11.

FIGS. 3A-3B and FIGS. 4A-4B are sectional views and bottom views of thelead-frame package structure in accordance with the FIG. 1 and FIG. 2.

Please referring to FIG. 3A, it is a sectional view of the packagestructure in the present invention. As shown in FIG. 3A, there is alead-frame 10 formed in accordance with a plurality of shorter leads 101and a plurality of longer leads 102. The shorter leads 101 and thelonger leads 102 are used to form a first surface 1011 and a secondsurface 1012. It should be noted that there are a plurality oflead-frame 10 formed on one sheet of copper foil in practical. But thereis only one lead-frame shown in the present drawing, the rest of thelead-frame are packaged with same process procedure. Still refer to FIG.3A, there is a chip 40 provided herein. The chip 40 includes an activelayer 402 and one side of the active layer 402 includes a plurality ofmetal pads 50. The reverse surface 401 of the chip 40 is connected tothe shorter leads 101 and the longer leads 102 by an adhesive layer 30on the first surface 1011. It should be noted that the material of theadhesive layer is polymer, such as a B-stage. Besides, the adhesivelayer 30 is able to stick on the reverse surface 401 of the chip 40 orthe first surface of the lead-frame 10, and it is not limited in thepresent invention.

After the process described above, a wire bonding process is used toelectrically connect a plurality of metal pads 50 on the leads 101, theleads 102 and the active layer of the chip 40 by a plurality of metalleads 60. After the wire bonding process, an encapsulated process isused to cover the active layer 402 of the chip 40, the metal leads 60,the first surface 1011 and the second surface 1012 of the lead-frame 10by an encapsulant material. After the encapsulated process, a removingprocess is used to remove the encapsulant material on the end 103 of thefirst lead 101 and the end 104 of the second lead 102 of the secondsurface 1012 of the lead-frame 10 and expose the metal on the end 103and 104 (not shown). After the removing process, a connecting processfor the conductive element 80, such as a reflow soldering, is used tosequentially form a metal bump on each of the ends 103 and the ends 104.The conductive element 80 is also able to be a metal ball. Obviously, inthe present embodiment, because of the structure of the lead-frame 10, adual rows package structure is formed, such as shown in FIG. 3B.

Therefore, as the description above, the conductive elements 80 areformed on the second surface 1012 of the lead-frame 10 by a 2×narrangement method. The n can be any numbers depended on therequirement. Besides, in the present embodiment, the conductive element80 can be metal bump or solder ball. The conductive element 80 isdisposed on each of the leads (the shorter leads 101 and the longerleads 102) and the lengths of the conductive elements 80 are equal toeach other.

Please refer to FIG. 4A and FIG. 4B. Those are sectional view and bottomview in accordance with another embodiment of the package structure inthe present invention. As shown in FIG. 4A and FIG. 4B, the differentbetween FIGS. 3A-3B and FIGS. 4A-4B is the lead frame structure. Thelead-frame 20 in the present embodiment includes a plurality of firstleads 201, a plurality of second leads 202, a plurality of third leads203 and a plurality of forth leads 204 and those leads (201, 202, 203and 204) are use to form a first surface and a second surface. Each ofthe first leads 201, each of the second leads 202, each of the thirdleads 203 and each of the forth leads 204 are respectively andalternatively paralleled to each other and formed with different length.Except for the shortest lead (such as the third lead 203), the ends ofthe longer leads are formed a geographic shape, such as L shape orcurved shape. The ends of the first leads 201, the second leads 202, thethird leads 203 and the forth leads 203 are disposed at the samehorizontal 11. Therefore, the plurality of conductive elements 80 areformed an array in accordance with the sticking process of the chip 40,the wire bonding process, the molding process, the removing process andthe reflow soldering process, as shown in FIG. 4A and FIG. 4B. It shouldbe noted that the 4×n array shown in figures are just one embodiment inthe present invention. It should not be the limitation of the size ofthe array. The object with the lead-frame array package structuredisclosed herein should be included in the embodiment of the presentinvention.

Please refer to FIG. 5A and FIG. 5B. Those are sectional view and bottomview in accordance with another embodiment of the present invention. Inthe present embodiment, a stamp process is used to form a plurality oflead-frames 20 on the copper foil. The lead-frame 20 is formed by aplurality of first leads 901 and a plurality of second leads 902 in thepresent embodiment. The first leads 901 and the second leads 902 arerespectively and alternatively paralleled to each other. The first leads901 include a plurality of shorter leads 9011 and a plurality of longerleads 9012. The second leads 902 include a plurality of short leads 9021and a plurality of long leads 9022. In addition, the longer leads 9011and 9021 in the first leads 901 and the second leads 902 and the shorterleads 9012 and 9022 in the first leads 901 and the second leads 902 arerespectively and alternatively paralleled to each other. There is afixed distance between the longer leads 9011, 9021 and the shorter leads9012, 9022. The longer leads 9011, 9021 include the ends with geographicshape, such as L shape or curved shape. The ends with geographic shapeare disposed at the same horizontal 11, as shown in FIG. 5B.

Now refer to FIG. 5, a portion of the reverse surface 401 of the chip 40is stuck on the first leads 901 and the second leads 902 of thelead-frame 20 by an adhesive layer 30. The two sides of the activesurface 402 of the chip 40 in the present embodiment dispose a pluralityof metal pads. Then, the metal lead bonding technique is used toelectrically connect the metal pads 50 on the two sides of the activesurface 402 of the chip 40 and the first leads 901 and the second leads902 of the lead-frame 20 by a plurality of metal leads 60. Subsequently,the encapsulant material 70 is used to cover the chips 40, the metalleads 60 and the first leads 901 and the second leads 902 of thelead-frame 20.

A removing process is used to remove the encapsulant material on thefirst leads 901 and the second leads 902 and expose the metal on thefirst leads 901 and the second leads 902 (not shown). After the removingprocess, a connecting process for the conductive element 80, such asreflow soldering, is used to sequentially form a conductive element 80on the ends of the first leads 901 and the second leads 902. Theconductive element 80 is also able to be a metal ball. Obviously, in thepresent embodiment, because of the structure of the lead-frame 20, anarray package structure made by a plurality of conductive element 80 isformed, such as shown in FIG. 5B.

Besides, the encapsulated material 70 in the embodiment of FIGS. 3A-3B,FIGS. 4A-4B and FIGS. 5A-5B is to cover the chip 40, the metal leads 60,the first surface and the second surface of the lead-frame and saw thechip 40 in accordance with the sawing line 90 by a sawing process toisolate the chips. Because the sawing process in the present inventionis used to saw a portion of un-bumping leads to shorten the size of thepackage structure, the redistribution-layer (RDL) problem occurred inthe prior art is not necessary to worry about. The step to calculate theinterval between the chips is not needed when sawing the packagestructure. The sawing apparatus would not affect the package structureby the sawing process. It is not necessary to think about changing thesawing apparatus in the present invention. Therefore, according to thelead-frame array package disclosed in the present invention, it wouldreduce the cost and shorten the size of the package structure.

According to the description above, a lead-frame array package structureis disclosed in the present invention. The package structure includes alead-frame, which composed of a plurality of shorter leads and aplurality of longer leads. The first surface and a second surface arecomposed of the plurality of shorter leads and the plurality of longerleads. The chip is fixedly connected to the first surface of thelead-frame. The plurality of metal pads is positioned on the one side ofthe active layer of the chip. The plurality of metal pads iselectrically connected to the plurality of leads of the lead-frame viathe plurality of metal wires. The chip, the plurality of metal wires,the first surface and the second surface of the lead-frame isencapsulated by encapsulant material to expose the portion of the metalof the plurality of leads. The plurality of conductive elements iselectrically connected to exposed leads so as to an array arrangement isformed on the second surface of the lead-frame.

Besides, please refer to FIG. 6, a lead-frame array package method isalso disclosed in the present invention. The package method includes:forming a lead-frame in accordance with a plurality of shorter leads anda plurality of longer leads, and the shorter leads and the longer leadsare respectively and alternatively paralleled to form a first surfaceand a second surface, a geographic shape is formed at the end of each ofthe longer leads, the end with the geographic shape is disposed at thesame horizontal as the end of each of the shorter lead; fixedlyconnecting a chip to the first surface of the lead-frame by a adhesivelayer and the chip includes an active layer, one side of the activelayer including a plurality of metal pads disposed thereon; executing awire bonding process to electrically connect a plurality of metal leadsto the metal pads on the chip and the plurality of leads on thelead-frame; executing an encapsulated process to cover the chip, themetal leads and the first surface and the second surface of thelead-frame by an encapsulated material; exposing a portion of the metalof the second leads of the lead-frame by removing the encapsulantmaterial on each end of the leads in accordance with a removing process;and forming a plurality of conductive elements on the exposed metalleads and the conductive elements are used to electrically connected tothe exposed metal leads.

Although specific embodiments have been illustrated and described, itwill be appreciated by those skilled in the art that variousmodifications may be made without departing from the scope of thepresent invention, which is intended to be limited solely by theappended claims.

1. A semiconductor package structure comprising: a lead-frame formed bya plurality of shorter leads and a plurality of longer leads, and theshorter leads and the longer leads are respectively and alternativelyparalleled to form a first surface and a second surface, a geographicshape is formed at the end of each of the longer leads, the ends withthe geographic shape are disposed at the same horizontal as the end ofeach of the shorter leads; a chip fixedly connected to the first surfaceof the lead-frame by an adhesive layer and including an active layer,one side of the active layer having a plurality of metal pads disposedthereon; a plurality metal wires used to electrically connect the metalpads on the chip and the leads of the lead-frames; an encapsulantmaterial used to cover the chip, the metal leads and the first surfaceand the second surface of the lead-frame, and expose a portion of themetal of the leads; and a plurality of conductive elements electricallyconnected to the exposed metal of the leads to form a dual row deploy onthe second surface of the lead-frame.
 2. The package structure of claim1, wherein the material of the adhesive layer is B-stage.
 3. The packagestructure of claim 1, wherein the conductive elements are conductivebump.
 4. The package structure of claim 1, wherein the conductiveelements are solder ball.
 5. The package structure of claim 1, whereinthe geographic shape is L-shape.
 6. The package structure of claim 1,wherein the geographic shape is curved shape.
 7. A semiconductor packagestructure comprising: a lead-frame formed in accordance with a pluralityof shorter leads and a plurality of longer leads, and the shorter leadsand the longer leads are respectively and alternatively paralleled toform a first surface and a second surface, a geographic shape is formedat the end of each of the plurality of longer leads, the ends with thegeographic shape are disposed at the same horizontal as the end of eachof the shorter leads; a chip fixedly connected to the first surface ofthe lead-frame by a adhesive layer and including an active layer, oneside of the active layer having a plurality of metal pads disposedthereon; a plurality metal leads used to electrically connect the metalpads on the chip and the leads on the lead-frame; an encapsulantmaterial used to cover the chip, the metal leads and the first surfaceand the second surface of the lead frame lead-frame, and expose aportion of the metal of the leads; and a plurality of conductiveelements electrically connected to the exposed metal of the leads andformed an array deploy on the second surface of the leads.
 8. Thepackage structure of claim 7, wherein the conductive elements are solderball.
 9. The package structure of claim 7, wherein the geographic shapeis L-shape.
 10. The package structure of claim 7, wherein the geographicshape is curved shape.
 11. A semiconductor package structure comprising:a lead-frame formed in accordance with a plurality of first leads and aplurality of second leads, and the first leads and the second leads areused to form a first surface and a second surface, the first leads andthe second leads have a plurality of longer leads and a plurality ofshorter leads, the longer leads and the shorter leads are respectivelyand alternatively paralleled, a geographic shape is formed at the end ofeach of the longer leads, the ends with the geographic shape aredisposed at the same horizontal as the end of each of the shorter leads;a chip fixedly connected to the first surface of the lead-frame by aadhesive layer and including an active layer, two corresponding side ofthe active layer having a plurality of metal pads disposed thereon; aplurality metal leads used to electrically connect the metal pads on thechip and the leads on the lead-frame; an encapsulant material used tocover the chip, the metal leads and the first surface and the secondsurface of the lead-frame, and expose a portion of the metal of theleads; and a plurality of conductive elements electrically connected tothe exposed metal of the leads and formed a dual row deploy on thesecond surface of the leads.
 12. The package structure of claim 11,wherein the conductive elements are disposed on the second surface ofthe lead frame by the way of bi-parallel.
 13. The package structure ofclaim 11, wherein the conductive elements are disposed on the secondsurface of the lead frame by the way of array.
 14. A lead-frame packagemethod comprising: forming a lead-frame in accordance with a pluralityof shorter leads and a plurality of longer leads, and the shorter leadsand the longer leads are respectively and alternatively paralleled toform a first surface and a second surface, a geographic shape is formedat the end of each of the longer leads, the end with the geographicshape is disposed at the same horizontal as the end of each of theshorter leads; fixedly connecting a chip to the first surface of thelead-frame by a adhesive layer and the chip has an active layer, oneside of the active layer having a plurality of metal pads disposedthereon; executing a wire bonding process to electrically connect aplurality of metal leads to the metal pads on the chip and the pluralityof leads on the lead-frame; executing an encapsulated process to coverthe chip, the metal leads and the first surface and the second surfaceof the lead-frame by an encapsulant material; exposing a portion of themetal of the second leads of the lead-frame by removing the encapsulantmaterial on each end of the leads in accordance with a removing process;and forming a plurality of conductive elements on the exposed metalleads and the conductive elements are used to electrically connected tothe exposed metal leads.
 15. The package structure of claim 14, whereinthe longer leads are formed by a group of leads.
 16. A lead-framepackage structure formed in accordance with a plurality of shorter leadsand a plurality of longer leads, and the shorter leads and the longerleads are respectively and alternatively paralleled to each other,characterized by: a geographic shape formed at the end of each of thelonger leads and the end with the geographic shape is disposed at thesame horizontal as the end of each of the shorter leads.
 17. Alead-frame package structure formed in accordance with a plurality ofshorter leads and a plurality of leads, which is longer leads than theshort leads, and the shorter leads and the longer leads are respectivelyand alternatively paralleled to each other, characterized by: ageographic shape formed at the end of each of the longer leads and theend with the geographic shape is disposed at the same horizontal as theend of each of the shorter leads.
 18. A lead frame package structureformed in accordance with a plurality of first leads and a plurality ofsecond leads, the first leads includes a plurality of shorter leads anda plurality of longer leads, the second leads includes a plurality ofshorter leads and a plurality of longer leads, and the first leads andthe second leads are respectively and alternatively paralleled to eachother, characterized by: a geographic shape formed at the end of each ofthe longer leads and the end with the geographic shape is disposed atthe same horizontal as the end of each of the short lead.